This is almost certainly the technology used in the camera of your mobile phone. CMOS sensors consist of large arrays of photodiodes. Each pixel contains, in addition to the photodiode, a small number of transistors that are used to control the resetting and reading of the pixel. A minimum of three transistors is needed although much higher performance can be achieved if additional transistors are used in combination with a pinned photodiode. An example of a “4T” pixel, i.e. one containing four transistors, is shown below:

This design has two big advantages. First, the output node (visible as a red n+ implant in the diagram above) can be designed with a very small capacitance and consequently very high charge-to-Voltage conversion sensitivity. Also, the transfer gate T1 shields the node from the parasitic capacitance of the photodiode, which could be considerable for larger pixel sizes. This can give read noise below one electron RMS. Second, the charge that is integrated on the photodiode over the course of the exposure is only transferred onto the output node at the end of the exposure. Consequently, the video signal chain can be AC coupled reducing greatly the susceptibility to thermal drifts and 1/f noise.
CMOS sensors in the past have not been competitive with CCDs for most scientific imaging applications due to the lack of red response. This was because they were manufactured on standard 5um epitaxial silicon which is transparent to red light. More recently e2v have developed scientific CMOS manufactured on much thicker silicon and the red-end QE is now greatly improved.
To fully exploit the thicker silicon a back-bias must be applied to deplete the photodiode volume. This reduces charge recombination and boosts QE. The structure of these fully-depleted pixels is shown below. Note that the light enters the silicon from the backside (lower surface) which further improves performance since no light will be absorbed by the transistor structures. The optically clean lower surface can also be anti-reflection coated to further boost QE.
Most CMOS sensors have the video processor integrated on-chip and produce a direct digital output. This greatly simplifies the external sensor control electronics. It also allows them to achieve very high frame rates (100s of Hz).
CCDs remain very popular and have yet to be displaced for the most demanding scientific imaging applications. There are several reasons for this. First, CCDs are very simple and clean devices. They have a small number of output amplifiers all of which have similar properties. All pixels passing through one of these amplifiers will all experience the same read noise and linearity performance. This simplifies the data reduction process. In contrast, each pixel in a CMOS sensor has a different noise level. The noise quoted by the manufacturer will probably be the median of all the pixels whereas in reality the noise distribution will have a large tail extending to higher values. If one of these noisy pixels , within the tail of the distribution, falls within a faint region of interest then it could seriously degrade the SNR of the observation.
Further information:
Design and Performance of a Pinned Photodiode
CMOS Image Sensor Using Reverse Substrate Bias


